Fabrication and Stability Characterisation of Thin Film Transistors Based on Indium Zinc Oxide Deposited at Low Temperature
Dr Andrew Flewitt,
University of Cambridge, United Kingdom
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This presentation was
given at Printed Electronics Asia 2008 on Oct 08, 2008.
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Speaker BiographyDr Andrew Flewitt, who is a member of the Cambridge University Engineering Department, received his PhD from the University of Cambridge in 1998 investigating the growth of hydrogenated amorphous silicon thin films using scanning tunnelling microscopy. He stayed in the Engineering Department following the Ph. D. as a Research Associate sponsored by Philips Research Laboratories working on the low temperature fabrication of thin film transistors for liquid crystal displays. He was appointed to Lectureship in August 2002, promoted to Senior Lecturer in 2006 and appointed Reader in Electronic Engineering in 2009. Current research interests include the degradation mechanisms of amorphous silicon thin films transistors, metal oxide thin film transistors, nanowire-polymer composite semiconductor materials and MEMS-based biological sensing devices using acoustic wave technology. Company ProfileCambridge University Engineering Department, which was rated as a 5* Department in the last Research Assessment Exercise, has been carrying out research in thin film transistors based on amorphous silicon and other inorganic materials for more than ten years. It has a state-of-the-art clean facility within the Centre for Advanced Photonics and Electronics. This includes 160 m2 of Class 10,000 laboratories which houses a range of deposition systems for producing a diverse range of materials including metallic thin films, amorphous silicon, high-k dielectrics, carbon nanotubes and silicon nanowires. There is a further 140 m2 of Class 1,000 laboratories which includes processing facilities for 1 µm photolithography and nanoparticle-polymer composite processing. Finally, there is 140 m2 of Class 100 laboratories which includes a rapid thermal annealer, deep reactive ion etch system, liquid crystal processing facility, 0.5 µm double-sided mask aligner and an e-beam lithography system.
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