Fabrication and Stability Characterisation of Thin Film Transistors Based on Indium Zinc Oxide Deposited at Low Temperature
![]() Dr Andrew Flewitt,
University of Cambridge, United Kingdom
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This presentation was
given at Printed Electronics Asia 2008 on 2008年10月8日.
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講演者の経歴 (Andrew Flewitt)Andrew J. Flewitt received the B.Sc. degree in physics from the University of Birmingham, Birmingham, U.K., in 1994 and the Ph.D. degree in scanning tunneling microscopy of amorphous silicon from the University of Cambridge, Cambridge, U.K., in 1998. Following this, he was a Research Associate studying the low-temperature growth of silicon-based materials in the Engineering Department, University of Cambridge. He was appointed to a Lectureship in the same Department in 2002. Since 2009, he has held the position of University Reader in Electronic Engineering. His research interests span a broad range of large area electronics and related fields, including thin film transistors and MEMS devices. Dr. Flewitt is a Chartered Physicist and a Member of the Institute of Physics and the Institution of Engineering and Technology. 会社紹介 (University of Cambridge, Dept of Engineering)Cambridge University Engineering Department, which was rated as a 5* Department in the last Research Assessment Exercise, has been carrying out research in thin film transistors based on amorphous silicon and other inorganic materials for more than ten years. It has a state-of-the-art clean facility within the Centre for Advanced Photonics and Electronics. This includes 160 m2 of Class 10,000 laboratories which houses a range of deposition systems for producing a diverse range of materials including metallic thin films, amorphous silicon, high-k dielectrics, carbon nanotubes and silicon nanowires. There is a further 140 m2 of Class 1,000 laboratories which includes processing facilities for 1 µm photolithography and nanoparticle-polymer composite processing. Finally, there is 140 m2 of Class 100 laboratories which includes a rapid thermal annealer, deep reactive ion etch system, liquid crystal processing facility, 0.5 µm double-sided mask aligner and an e-beam lithography system. |


