Printing Silicon Integrated Circuits

Dr. Jayna Sheats (Ph.D., Chemistry, Stanford University) is CTO and co-founder of Terepac Corporation. From 2004-2008 she was Vice President of Manufacturing Technology and subsequently Associate CTO at Nanosolar, Inc. From 2002-2004, she was a consultant, Chief Scientist at Novus Communications Technologies, and initial CTO and co-founder of Intelleflex Corporation and Rolltronics Corporation. Previously she worked for 20 years at HP Labs on microlithography, superconductivity, electroluminescence, and Internet technology for the developing world. She is a fellow of the AAAS and has authored 55 journal articles and more than 20 patents.

Terepac Corporation is a pioneer in semiconductor packaging and assembly and flexible electronic footprint miniaturization. With no theoretical lower limit on chip size deployable, the entire gamut of products exploiting distributed, ubiquitous electronics will be made available, creating huge new markets for new (especially flexible) form factors. These products cover a wide range of complexity from item level low cost RFID to multifunction smart labels; from edge of the network sensor nodes to high end medical and industrial instrumentation. The process, combining the performance of silicon with the economics of printing, aims to enable electronics everywhere.