With the increasing demand in computation and low latency, the semiconductor industry is transitioning from 2.5D packaging (e.g., B200 and MI350) to next-generation 3D packaging architecture. However, 3D semiconductor packaging faces unprecedented challenges such as IR drop in the power delivery network, thermal coupling of vertically stacked dies, and complexities of fabricating many through-silicon-vias (TSVs). In order to mitigate these challenges to accelerate the adoption of 3D semiconductor packaging, the industry is exploring a variety of approaches, such as using high-performance TIMs (e.g., graphene, liquid metal, etc.) to enhance heat transfer and introducing liquid-cooled microchannels inside of packaging (also known as microfluidic cooling).
In this webinar, IDTechEx will cover the following trends and analysis of the thermal challenges of advanced semiconductor packaging, emerging technologies, and future market opportunities:
- Overview of semiconductor packaging architecture from 2.5D to 3D
- Power delivery and thermal challenges of 3D packaging
- Emerging thermal interface materials and technology roadmap of novel materials, focusing on liquid metal, graphene, thermal-filled gels, and indium foil.
- Introduction to microfluidic cooling and microfluidic-cooled semiconductor architectures.
- Market outlook of thermal interface materials for advanced semiconductor packaging from 2025 to 2035