The Path to Greener Semiconductor Patterning

Electronics manufacturing requires vast amounts of energy, water, materials, and chemicals. With new legislation and ambitious emission reduction targets for manufacturers, adopting more sustainable processes and materials is essential. Semiconductor wafer patterning is a wasteful subtractive process, with photolithography and etching steps the largest contributors to emissions from integrated circuit manufacturing. This is exacerbated by advancing technology nodes. Significant improvements can be achieved through process optimization and advancements, improved abatement, and research into greener chemicals.
 
In this webinar, IDTechEx Technology Analyst Thomas Bithell will discuss:
  • The issues with conventional semiconductor manufacturing and circuit patterning.
  • Barriers and opportunities for sustainable manufacturing processes.
  • The search for green chemicals and PFAS alternatives for semiconductor circuit patterning.
  • The impact of EUV lithography on sustainability.
  • Research focuses and advancements in dry etching.
 
This article follows the release of the new IDTechEx report, "Sustainable Electronics and Semiconductor Manufacturing 2025-2035: Players, Markets, Forecasts".

Presenter

Registration

We will be hosting the same webinar 3 times in one day, so please join which ever session is the most convenient for you.
Spaces are limited

Date:
Thursday 27 February 2025

Duration:
20 minutes

Webinar Times

Session #1 - Asia-Pacific
2:00am (London Time)
Session #2 - Europe
10:00am (London Time)
Session #3 - Americas
5:00pm (London Time)