데이터 센터 및 클라우드용 AI 칩 2025-2035: 기술 동향, 주요 기업 및 시장 전망

이 보고서에서 아래와 같은 주요 정보를 제공합니다.

 

AI 칩을 위한 하드웨어 평가, 벤치마킹 및 비교

 

시장 정보

 

시장 전망 및 분석

 

이 보고서에서 다루는 주요 내용/목차는 아래와 같습니다.

 

1. 핵심 요약

2 AI 모델 및 AI 칩 소개

2.1 AI의 기초

2.2 대규모 AI 모델

3 기술 개요

3.1 명령어 집합 아키텍처

3.2 프로그래밍 모델

3.3 하드웨어 아키텍처

3.4 트랜지스터

3.5 첨단 반도체 패키징

4 AI 기능을 갖춘 중앙 처리 장치(CPU)

4.1 CPU의 기술 개요

4.2 주요 기업 현황

5 그래픽 처리 장치(GPU)

5.1 GPU의 시장 개요

5.2 GPU 기술 분석

5.3 주요 기업 현황

6 클라우드 서비스 제공업체(CSP)를 위한 맞춤형 AI ASIC

6.1 CSP용 맞춤형 AI ASIC의 시장 개요

6.2 CSP용 맞춤형 AI ASIC의 하드웨어 분석

6.3 주요 기업 현황

7 기타 AI 칩

7.1 이기종 매트릭스 기반 AI 가속기 및 주요 기업 현황

7.2 공간 기반 AI 가속기와 주요 기업 현황

7.3 조립형 재구성 가능 어레이(CGRA)

8 벤치마크 및 하드웨어 트렌드

8.1 AI 칩 벤치마킹

8.2 성능 및 확장성

8.3 에너지 효율성

8.4 메모리 및 메모리 대역폭

8.5 새로운 AI 가속기의 성능 평가를 위한 고려 사항

9 공급망, 투자 및 무역 규제

9.1 공급망

9.2 투자

9.3 무역 규제

10 시장 전망

 

Frontier AI attracts hundreds of billions in global investment, with governments and hyperscalers racing to lead in domains like drug discovery and autonomous infrastructure. Graphics processing units (GPUs) and other AI chips have been instrumental in driving this growth of artificial intelligence, providing the compute needed for deep learning within data centers and cloud infrastructure. GPUs have been pivotal in delivering computational capabilities, being the dominant undercurrent below the wave that is large language models (LLMs) and generative AI. However, with the demand for more efficient computation, lower costs, higher performance, massively scalable systems, faster inference, and domain-specific computation, there is opportunity for other AI chips to grow in popularity.

 

As the landscape of AI chips broadens past just GPUs, with novel architectures reaching widescale commercialization, IDTechEx's report "AI Chips for Data Centers and Cloud 2025-2035: Technologies, Market, Forecasts" offers an independent analysis of the AI chip market for data centers and the cloud. This includes benchmarking current and emerging technologies, technology breakdowns, and key trends, covering current and emerging hardware architectures, advanced node technologies, and advanced semiconductor packaging, as well as information on supply chain, investments, and policy. Granular revenue forecasts from 2025 to 2035 of the data center and cloud AI chips market are provided, segmented by types of AI chips. These include GPUs, custom AI application-specific integrated circuits (ASICs) used by hyperscalers and cloud service providers (CSPs), AI-capable central processing units (CPUs), and other AI ASICs developed by both AI chip-focused startups and large vendors.

 

 

The largest systems for AI are massive scale-out HPC and AI systems - these heavily implement GPUs. These tend to be hyperscaler AI data centers and supercomputers, both of which can offer exaFLOPS of performance, on-premise or over distributed networks. NVIDIA has seen remarkable success over recent years with its Hopper (H100/H200) chips and recently released Blackwell (B200/B300) chips. AMD has also created competitive chips with its MI300 series processors (MI300X/MI325X). Chinese players are also developing solutions due to sanctions from the US on advanced chips. These high-performance GPUs continue to adopt the most advanced semiconductor technologies. One example is increased on-chip memory capacity, with top chips having over 250GB of high-bandwidth memory (HBM), enabling larger AI models with even more parameters to run on these GPUs. These chips also adopt the most advanced semiconductor packaging solutions, such as TSMC's CoWoS-L packaging, chiplets, and multi-die GPUs, as well as the most advanced process nodes (5nm and below). All of these trends and market activities are explored in detail in this report.

 

GPUs have been fundamental for training AI models but face limitations, such as high total cost of ownership (TCO), vendor lock-in risks, low utilization for AI-specific operations, and can be overkill for specific inference workloads. An emerging strategy that hyperscalers are adopting is using systolic array-based custom AI ASICs. These have purpose-built cores for AI workloads, are cheaper per operation, are specialized for particular systems (e.g., transformers, recommender systems, etc), offer efficient inference, and give hyperscalers and CSPs the opportunity for full-stack control and differentiation without sacrificing performance. Evaluation of potential risks, key partnerships, player activity, benchmarking, and technology overviews is available with this report.

 

Other AI chips are being commercialized to disrupt GPUs, with both similar and novel computing architectures. Some large chip vendors, such as Intel, Huawei, and Qualcomm, have designed AI accelerators (e.g., Gaudi, Ascend 910, Cloud AI 100), using heterogeneous arrays of compute units (similar to GPUs), but purpose-built to accelerate AI workloads. These offer a balance between performance, power efficiency, and flexibility for specific application domains. Often, these chips will contain matrix engines and tensor cores, which are designed to execute dense linear algebra operations like GEMM (General Matrix Multiply) and BMM (Batch Matrix Multiply) with high throughputs.

 

AI chip-focused startups often take a different approach, deploying cutting-edge architectures and fabrication techniques with the likes of dataflow-controlled processors, wafer-scale packaging, spatial AI accelerators, processing-in-memory (PIM) technologies, and coarse-grained reconfigurable arrays (CGRAs). Various companies have successfully launched these systems (Cerebras, Groq, Graphcore, SambaNova, Untether AI, and others) for data centers and cloud computing, often developing rack-scale solutions for easy enterprise deployment or offering usage on their own cloud platforms. These systems perform exceptionally, especially in scale-up environments. IDTechEx's report offers comprehensive benchmarking, comparisons, key trends, technology breakdowns, and player activity.

 

Developing an AI chip with competitive throughput for training (time-to-train) and inference (tokens per second), high-energy efficiencies (TOPS/watt), and associated software support is a stringent challenge for all chip designers. This process involves a fine balance of many steps, including selecting programming and execution models, designing optimized hardware and memory architecture, and fabrication with advanced process nodes and advanced semiconductor packaging. For instance, data center chips are adopting the most advanced process nodes from TSMC, Intel Foundry, and Samsung Foundry, using EUV (extreme ultraviolet) lithography techniques from ASML. These foundries are pushing transistor technologies past 5nm technologies using FinFET (Fin-field effect transistor) to sub-2nm nodes using GAAFET (gate-all-around FETs) with backside power delivery. Recent fabrication developments, device requirements, hardware architecture breakdowns, advanced semiconductor packaging details, supply chain, and programming model comparisons are all included throughout this report.

 

The various technologies involved in designing and manufacturing give wide breadth for future technological innovation across the semiconductor industry supply chain. Government policy and heavy investment show the prevalent interest in pushing frontier AI toward new heights, and this will require exceptional volumes of AI chips within AI data centers to meet this demand. IDTechEx forecasts this market will grow at a CAGR of 14% from 2025 to 2030, with revenues exceeding US$400 billion.

Hardware evaluation, benchmarking, and comparison for AI chips

 

Market information

 

Market forecast and analysis

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